Shared memory multiprocessors are becoming the dominant architecture for small-scale parallel computation. This book is the first to provide a coherent review of current research in shared memory multiprocessing in the United States and Japan. It focuses particularly on scalable architectures that will be able to support hundreds of microprocessors as well as on efficient and economical ways of connecting these fast microprocessors. The twenty contributions are divided into sections covering the experience to date with multiprocessors, cache coherency, software systems, and examples of scalable shared memory multiprocessors.
About the Editor
Norihisa Suzuki is Director of the IBM Tokyo Research Laboratory. He is the co-inventor of the snoop cache, which in the early 1980s helped make it possible to build affordable and reliable shared memory multiprocessors.