Effective Coding with VHDL
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Effective Coding with VHDL

Principles and Best Practice

By Ricardo Jasinski

A guide to applying software design principles and coding practices to VHDL to improve the readability, maintainability, and quality of VHDL code.
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A guide to applying software design principles and coding practices to VHDL to improve the readability, maintainability, and quality of VHDL code.

This book addresses an often-neglected aspect of the creation of VHDL designs. A VHDL description is also source code, and VHDL designers can use the best practices of software development to write high-quality code and to organize it in a design. This book presents this unique set of skills, teaching VHDL designers of all experience levels how to apply the best design principles and coding practices from the software world to the world of hardware. The concepts introduced here will help readers write code that is easier to understand and more likely to be correct, with improved readability, maintainability, and overall quality.

After a brief review of VHDL, the book presents fundamental design principles for writing code, discussing such topics as design, quality, architecture, modularity, abstraction, and hierarchy. Building on these concepts, the book then introduces and provides recommendations for each basic element of VHDL code, including statements, design units, types, data objects, and subprograms. The book covers naming data objects and functions, commenting the source code, and visually presenting the code on the screen. All recommendations are supported by detailed rationales. Finally, the book explores two uses of VHDL: synthesis and testbenches. It examines the key characteristics of code intended for synthesis (distinguishing it from code meant for simulation) and then demonstrates the design and implementation of testbenches with a series of examples that verify different kinds of models, including combinational, sequential, and FSM code. Examples from the book are also available on a companion website, enabling the reader to experiment with the complete source code.

Hardcover

$53.00 X ISBN: 9780262034227 624 pp. | 9 in x 7 in 137 figures

Endorsements

  • This is the book that so many of us have been waiting for. It goes way beyond teaching VHDL language to address the principles of design. Ricardo Jasinski takes the wisdom learned from software gurus like Martin Fowler and Ward Cunningham and translates it to hardware design. It will challenge you to be a better coder and a better designer.

    Philippe Faes

    PhD, CEO of Sigasi

  • Hardware designers tend to produce poorly structured VHDL while software designers often do not adequately consider resource constraints of size, speed, and real-time response. This sorely needed book shows readers how to implement and verify projects that not only meet the hardware functionality requirements but do so with concise, readable, and reusable VHDL.

    Donald W. Bouldin

    Professor Emeritus of Electrical Engineering and Computer Science, University of Tennessee